A Novel Geometric Algorithm for Fast Wire-Optimized Floorplanning
نویسندگان
چکیده
As the size and complexity of VLSI circuits increase, the need for faster floorplanning algorithms also grows. In this work we introduce Traffic, a new method for creating wireand areaoptimized floorplans. Through the use of connectivity grouping, simple geometry, and efficient data structures, Traffic achieves higher result quality than Simulated Annealing (SA) in a fraction of the time. This speed allows designers to explore a large circuit design space in a reasonable amount of time, rapidly evaluate small changes to big circuits, and quickly produce initial solutions for other floorplanning algorithms.
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